November 30, 2007
INTEL PENRYN

New Era of 45 nm CPU Technology

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Intel Penryn: New Era of 45 nm CPU Technology
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In September 2007, Intel has announced their new 45 nanometer based processor in San Fransisco, while AMD still developing their 65 nm based processor. In November 2007, Intel has shipped its first 45 nanometer based processor on the 5400-series Xeon® platform. This processor (codenamed Penryn) using High-k + Metal-Gate technology. Gordon Moore (Intel Co-Founder) describes the innovations as "the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s." Even Time magazine recognized the Intel Penryn microprocessor as one of the best inventions of 2007.
Important advances include the addition of new instructions (including SSE4, also known as Penryn New Instructions) and new fabrication materials (most significantly a hafnium-based dielectric).

On May 2008, Intel will prepare Nehalem, a new 4 Core processor with 45 nm based technology. This processor will be equipped with Memory Controller integrated with new System Bus called "Quick Path" which will give more power and faster. Nehalem will be available in 2 Core, 4 Core and 8 Core. Every Core will run with 2 thread simultaneously.

45 nm Technology

The 45 nanometer (45 nm) process is the next milestone in semiconductor fabrication. First 45nm wafer is produced in Intel factory at Fab D1D, Oregon, USA. Intel has started mass producing 45 nm chips in November 2007, while AMD has targeted its commercial production for 2008. IBM, Infineon, Samsung, and Chartered Semiconductor have already completed a common 45 nm process platform. Then by the end of 2008, Semiconductor Manufacturing International Corporation (SMIC) will be the first China-based semiconductor company to move to 45 nm, having licensed the bulk 45 nm process from IBM. ITRS reported the 45 nm technology node should have significantly tighter specifications than the current 65 nm node. ’45 nm’ itself should refer to the average half-pitch of a memory cell manufactured at that technology level.

Many critical feature sizes are smaller than the wavelength of light used for lithography, i.e., 193 nm and/or 248 nm. A variety of techniques, such as larger lenses, are used to make sub-wavelength features. Double patterning may also be introduced to assist in shrinking distances between features, especially if dry lithography is used. It is expected that more layers will be patterned with 193 nm wavelength at the 45 nm node. Moving previously loose layers (such as Metal 4 and Metal 5) from 248 nm to 193 nm wavelength is expected to continue, which will likely further drive costs upward, due to difficulties with 193 nm photoresists.
45nm Processor Wafer with Paper Clips
www.intel.com
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45nm Processor Wafer with Paper Clips
Processors on an Intel 45nm Hafnium-based High-k Metal Gate "Penryn" Wafer photographed with paper clips.
Intel stated in 2003 that high-k gate dielectrics may be introduced at the 45 nm node to reduce gate leakage current. Chipmakers have since then voiced concerns about introducing these new materials into the gate stack. As of 2007, however, both IBM and Intel have announced that they have high-k and metal gate solutions, which Intel considers to be a fundamental change in transistor design.

High-k + Metal-Gate

The main problem in shifting to a smaller manufacturing technology (example using smaller transistors) is leakage current. While on old CPUs using bigger manufacturing technology leakage is not such a big issue, when we are talking about CPUs with very small transistors, leakage can represent not only a big waste of power but also overheating. On the other hand, smaller transistors translate into a faster switching speed for higher performance.

Transistors inside the CPU are traditionally built using a polysilicon gate electrode and a silicon oxide gate dielectric, a material referred as a "low-K" material, meaning a relatively high leakage current.
The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s.
Gordon Moore, Intel Co-Founder
For years the CPU industry has been development of a high-K dielectric material to be used on the transistor gate. This material would present a far lower leakage current compared to a low-K material like silicon oxide.

What Intel has announced last week is that they developed such material (Hafnium-based, a chemical material on the same column of Zirconium and Titanium on the periodic table) and is using it on their 45 nm manufacturing process. Also, the gate electrode has been changed from polysilicon to metal (Intel did not say which material is used). The combination of a metallic gate electrode and a high-K dielectric material produces a higher current when the transistor is "on" and a lower current when the transistor is "off" — translating into a lower leakage current.



Next Roadmap

Intel has also announced that they will keep their roadmap and will be announcing their 32 nm manufacturing process in 2009 and their 22 nm manufacturing process in 2011.


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Date: November 30, 2007
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New Era of 45 nm CPU Technology
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